Manager, DRAM Product Planning

Please Note: To provide the best candidate experience amidst our high application volumes, each candidate is limited to 10 applications across all open jobs within a 6-month period. Advancing the World’s Technology Together Our technology solutions power the tools you use every day--including smartphones, electric vehicles, hyperscale data centers, IoT devices, and so much more. Here, you’ll have an opportunity to be part of a global leader whose innovative designs are pushing the boundaries of what’s possible and powering the future. We believe innovation and growth are driven by an inclusive culture and a diverse workforce. We’re dedicated to empowering people to be their true selves. Together, we’re building a better tomorrow for our employees, customers, partners, and communities. What You'll Do Samsung Semiconductor is seeking a highly motivated, strategic DRAM Product Planning Manager to drive customer adoption and secure Samsung’s position as the lead supplier for DRAM-based memory solutions across a diverse range of applications. In this role, you will act as the vital bridge between top-tier customers and our internal engineering and business teams, managing the entire lifecycle from initial design-in to final qualification. Location: Daily onsite presence at our San Jose headquarters in alignment with our Flexible Work policy plus an average of <10% of domestic and international travel. Reports To: Staff Engineer – R&D Product Development Technical Engagement & Engineering Collaboration

Drive Lead Supplier Status: Lead deep technical engagements with customer engineering teams to position Samsung's DRAM solutions as the primary choice for next-generation platforms. Hands-on Problem Solving: Facilitate collaborative engineering debugging and troubleshooting to resolve complex technical hurdles during evaluation, qualification, and mass production. Application-Specific Optimization: Analyze diverse customer system architectures to proactively propose optimized, cutting-edge memory solutions.

Co-Development Process Innovation

Align Product Roadmaps: Establish and govern a structured co-development framework that syncs the customer’s hardware roadmaps with Samsung’s memory technology pipeline. Define Joint Specifications: Collaborate closely with customer architects to co-define product specifications, interfaces, and feature sets that yield mutual competitive advantages. Feedback Loop Management: Channel critical customer architectural insights back to internal R&D and product planning teams to influence the next generation of memory products.

Business Model Development & Monetization Strategy

Value-Value Business Modeling: Design and implement innovative business models that move beyond commodity selling, focusing on Total Cost of Ownership (TCO) reduction and value-added memory features. Market-Specific Strategies: Formulate customized commercial and supply structures tailored to the unique dynamics of diverse application segments (e.g., Automotive, Server, Mobile, AI/HPC). Strategic Partnerships: Convert technical leadership into long-term commercial value, securing multi-year agreements and deep-rooted strategic alliances.

End-to-End Project Management

Cross-Functional Orchestration: Serve as the central program manager aligning multiple internal stakeholders—including Sales, Marketing, R&D, and Quality Assurance—with the customer’s milestones. Milestone Execution: Manage the entire execution pipeline from design-in, validation, and qualification (Qual) through to seamless mass production transition. Risk & Timeline Management: Proactively identify project risks, execute mitigation strategies, and guarantee time-to-market delivery according to aggressive customer schedules.

What You Bring

Bachelor’s degree in Electrical Engineering, Computer Science, or related Physical Science with 10+ years of experience or Master’s degree with 8+ Years of Industry Experience or PhD with 5+ years of Industry Experience. Memory & System Expertise: Strong understanding of DRAM design/architecture, system-level operations (RAS, Memory Controller, memory PHY), and product support. Hardware Analysis: Background in SI/PI (Signal/Power Integrity) and timing measurements. Semiconductor Fundamentals: Familiarity with fab processes, semiconductor manufacturing, and advanced packaging. Deep understanding of 2.5D/3D integration (TSV, Micro-bumping, and Hybrid Bonding). Customer & Leadership Track Record: Proven experience in customer-facing technical roles (Applications, Design, Validation, or Dev) leading enablement and debugging. Mobility: Flexibility to travel based on project and customer needs. Experience defining architecture and specifications for next-generation Custom HBM (HBM4+). Ability to plan active logic base-dies that integrate core IP (Memory Controller, advanced RAS, and processing elements). Proven track record collaborating with foundries (e.g., TSMC/Samsung Foundry/Intel Foundry advanced nodes) and design houses for custom silicon development. Experience defining customized interfaces (e.g., Die-to-Die PHY) for bespoke customer architectures (e.g., Hyperscaler XPUs, high-end GPUs). Analytical skills to evaluate system-level PPA (Power-Performance-Area) benefits and customer TCO optimization. You’re inclusive, adapting your style to the situation and diverse global norms of our people. An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding. You’re collaborative, building relationships, humbly offering support and openly welcoming approaches. Innovative and creative, you proactively explore new ideas and adapt quickly to change.

#LI-MD1 What We Offer The pay range below is for all roles at this level across all US locations and functions. Pay within this range varies by work location and may also depend on job-related knowledge, ski